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NXP Semiconductors /LPC5410x /MRT /IRQ_FLAG

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Interpret as IRQ_FLAG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NO_PENDING_INTERRUPT)GFLAG0 0 (GFLAG1)GFLAG1 0 (GFLAG2)GFLAG2 0 (GFLAG3)GFLAG3 0RESERVED

GFLAG0=NO_PENDING_INTERRUPT

Description

Global interrupt flag register

Fields

GFLAG0

Monitors the interrupt flag of TIMER0.

0 (NO_PENDING_INTERRUPT): No pending interrupt. Writing a zero is equivalent to no operation.

1 (PENDING_INTERRUPT): Pending interrupt. The interrupt is pending because TIMER0 has reached the end of the time interval. If the INTEN bit in the CONTROL0 register is also set to 1, the interrupt for timer channel 0 and the global interrupt are raised. Writing a 1 to this bit clears the interrupt request.
GFLAG1

Monitors the interrupt flag of TIMER1. See description of channel 0.
GFLAG2

Monitors the interrupt flag of TIMER2. See description of channel 0.
GFLAG3

Monitors the interrupt flag of TIMER3. See description of channel 0.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data